Tuesday, April 30, 2013
Tuesday, April 23, 2013
When dealing with fast changing signals or long transmission distances the signal propogation time becomes very important. In these cases we must use a transmission line model for signal wires. The basic loss-less model is a 4-terminal model with a distributed capacitance and inductance along the line. This model can be described with the Telegrapher's Equation. Basically this describes the propogation of signals using a 1D wave equation, who's general solution describes the superposition of two waves traveling in opposite directions. To visualize this effect I thought I would try to solve the Telegrapher's Equation using a lumped/finite element method. The basic idea is to divide the transmission line into a network of series inductors and parallel capacitors. The voltages and currents through the transmission line can be solved for using a transient circuit simulator.
I know that there exists a simplified SPICE model which can be used to easily and quickly solved for the currents/voltages at the ends of the transmission line. However, this model does not accurately model what happens inside the transmission line. There are also methods for solving the type of Partial Differential Equation described by the Telegrapher's Equation numerically. I chose the finite element method mainly because I wanted to learn more about how SPICE solvers work internally. This circuit should allow me to do that with a semi-complicated circuit. I also wanted to visualize the signal propogation of a pulse which can't be done using the SPICE transmission line model.
Tuesday, April 16, 2013
This is part 2 of my playing around with AVR microcontrollers. Last time, I had a basic setup which could program an AVR using the Arduino ISP. I used it to drive a simple 7-segment, multiplexed 4-digit LED display. This is a follow up where I try out some of the other features the ATTiny24A has to offer. I also decided to invest some money in an AVR Dragon programmer/debugger so I'll go over some basic playing and setup with this device. I'll also discuss some of the problems and pitfalls I've encountered along the way.
Tuesday, April 9, 2013
From my last playing around with primes post, I've finally managed to segment the sieving algorithm. This does a few different things:
- Reduces memory usage. Now the usage is proportional to the number of primes found plus some small fixed buffer.
- Increases locality when sieving. This should help with performance.
- Hopefully makes parallelization easier/possible.
- Finding the first x primes becomes a relatively straightforward and quick task.
Tuesday, April 2, 2013
In my last post I investigated a bit into a novel tracking pre-regulator design by John Barnes (I originally heard of this design in Dave Jones' EEVBlog #329 video). I had modeled mathematically the system rather than using SPICE simulation software as Dave did to play with the design and came up with a fairly nice model for figuring out what parameters to use. This is just a slight update as I investigated the design a bit further. In this post I'm going to present a novel way to make the transistor gain error nearly negligible.